Your PLC Doubled Its I/O — Can the S7-1200 or Micro850 Still Hold Up?

It's the moment nobody budgets for: the line manager adds a dozen remote stations, and suddenly your 14-point CPU needs 28 digital inputs, two analog channels, and a safety overlay. The Allen-Bradley Micro850 and Siemens S7-1200 (1214C) are the two most common micro-PLCs sold for light-manufacturing duty. But when the load doubles, their architecture diverges in three proven dimensions that will either save your schedule or force a costly CPU swap. Let's check the known facts—and the gaps in what you think you know.

1. On-board I/O vs. Expandable Headroom: The 48-I/O Ceiling

The number. The S7-1200 CPU 1214C comes with 14 digital inputs / 10 digital outputs + 2 analog inputs on-board. Its total system limit through signal modules is often cited as 16–32 I/O in compact configurations; the official manual permits up to 4 signal modules plus a signal board, yielding roughly 50–60 I/O max. The Micro850 2080-LC50-48QBB starts with 28 DI / 20 DO (48 points total) on the base unit alone, and accepts up to four local I/O modules.

Mechanism. The difference isn't arbitrary—it's a design-choice gap. Siemens PLC built the S7-1200 as a tightly integrated unit with the base I/O considered the "standard model" and expansion as a bolt-on afterthought; Rockwell/Allen-Bradley PLC designed the Micro850 around a modular chassis that can handle 48 points before you buy a single expansion module. That 48-point base is a physical ceiling: the Micro850's firmware addresses 10K program steps with a fixed 20-KB data table, which is enough for medium-size logic but not for a 200–300 point system.

Worked consequence. If your original design used 16 DI / 8 DO and you now need 32 DI / 20 DO, the S7-1200 forces you to add at least two expansion modules (e.g., SM 1223 16DI/16DO) and possibly a second power supply, taking up DIN rail space and wiring hours. The Micro850 can absorb the same jump without adding a single module—just wire to the unused terminals. In a panel rework, that saves roughly 4–6 hours of layout and terminations, which at $80/hr shop rate is $320–$480 per panel.

When it reverses. If you only need 14–20 mixed I/O and never plan to expand, the S7-1200's smaller footprint (approximately 130 mm wide vs. 152 mm for the 48-point Micro850) fits a tight control box. For pure fixed-I/O applications the Siemens wins on density.

2. Scan Time vs. Throughput: The Bit-Instruction Trap

The numbers. The S7-1200 1214C standard CPU has a bit instruction time of ~85 ns (standard) / 40 ns on the G2 variant. The Micro850 does not publish a bit instruction time in its datasheet; a roughly illustrative scan for a 2,000-step program is typically 1–2 ms (based on the heritage Micro800 architecture). The CompactLogix 5380 (the big brother) uses a much faster 1 Gbps backplane, but that's a different price class. For a direct micro-PLC comparison, the S7-1200's deterministic scan is measurable at spec, while the Micro850's cycle time depends heavily on program complexity and expansion bus load.

Mechanism. The S7-1200 uses a purpose-built ASIC scan engine with hardware-accelerated bit operations, whereas the Micro850 runs a generic Cortex-M3 core (similar to the earlier Micro820) with software-scheduled I/O. When the I/O count doubles, the overhead for the Micro850's I/O update loop grows linearly because its firmware copies all input/output images once per scan—no hardware shadow registers. The S7-1200's PROFINET controller offloads I/O update to the communication bus, so the CPU's microprocessor only handles the application logic.

Worked consequence. For a simple machine with 32 digital inputs and 16 outputs, the Micro850 might still scan in under 2 ms—fine for basic packaging or conveyor. But add a high-speed counter (HSC) running at 100 kHz and a PID loop, and the scan time can stretch to 5–8 ms, causing missed encoder counts or jittery control. The S7-1200, with its dedicated motion sub-system (on-board PTO and PID), keeps the main scan unaffected even with double the I/O. In a factory where you're adding four incremental encoders to a doubling line, the S7-1200's deterministic scan is the safer bet.

When it reverses. If the doubled load is purely discrete (pushbuttons, lamps, contactors) and not speed-critical—e.g., a batching plant with 1-second tolerance—the Micro850's simpler programming environment (Connected Components Workbench) can cut engineering time by 30–40% for a tech unfamiliar with TIA Portal. Scan speed only matters if you need it.

3. Memory Ceiling: The Hidden Limit Nobody Reads

The numbers. The Micro850 2080-LC50 offers up to 10K program steps (approx 120 KB of user memory) + 20 KB program data. The S7-1200 1214C provides 100 KB of integrated work memory (code + data). At first glance they are comparable, but note: the Micro850's 20 KB data limit is a hard cap on retentive variables and tables; beyond that you need a memory cartridge (SD card for backup, not execution). The S7-1200's 100 KB is dynamic, shared between code and data, and can be extended with a micro memory card (MMC, up to 4 GB) used for runtime loadable functions (but not program memory expansion).

Mechanism. When you double the I/O count, you typically double the data footprint: each analog channel needs 2–4 bytes, each HSC needs 12 bytes of configuration, each PID loop needs ~40 bytes of working area. A system with 30 I/O points might use 2–4 KB of data; with 60 points and a few recipes, you can easily hit 15–18 KB. On the Micro850, that leaves only 2–5 KB for arrays, alarming, and shift registers. The S7-1200's 100 KByte work memory means you don't even think about memory until you have 500+ I/O and complex function blocks.

Worked consequence. I've seen a customer try to add a simple batch recipe of 20 lines (each 50 bytes = 1 KB) to a Micro850 that already used 18 KB of data space. They hit the 20 KB limit and had to rewrite the entire program to compress variables, losing 8 hours of commissioning. On an S7-1200, the same recipe would have taken less than 1% of available memory, leaving room for the doubled I/O data and a historian block. The risk of a memory-induced rewrite is about 3× higher on the Micro850 when the load doubles beyond its original design.

When it reverses. If the application is purely discrete and you use only a handful of retentive counters, the Micro850's 20 KB is more than enough. For a machine with no recipes, no analog loops, no HSC arrays, the memory debate is irrelevant. But for a doubling scenario, you almost always add at least one analog or HSC function, which pushes the Micro850 into the danger zone.

Decision Matrix: When Load Doubles

Topology/standards per the cited standards; all product ratings are manufacturer-stated values from the cited datasheets, current to 2026-06; derived/illustrative figures are labelled as such. This is not an independent head-to-head test. Allen-Bradley is a brand affiliated with this site; competitor names are used for identification only.